HALF MOON BAY, Calif. — Extreme ultraviolet lithography (EUV) is set to enable 10-nm and 7-nm process nodes over the next few years, but significant work is still needed on photoresists to enable 5-nm chips, according to an analysis released at the Industry Strategy Symposium here.
At the same time, EUV maker ASML announced that it shipped 10 EUV systems last year and will ship 20 to 22 more this year. The systems will have, or at least support, a 250-W laser light source needed to produce 125 wafers/hour.
“The main pieces for EUV at 7 nm are in place … but photoresist defects are still an order of magnitude too high for 5 nm,” said Scotten Jones, president of IC Knowledge.
The new and expensive systems, in development more than 20 years, help make the fine features needed for next-generation chips and reduce the time required to make them. They will first be used on logic chips such as microprocessors and later applied to DRAMs but are not needed by today’s 3D NAND flash chips, said Scotten.
“EUV provides a tremendous reduction in cycle time and edge placement errors … but not much cost reduction, at least initially. There are so many other benefits that even if the cost is neutral, it still makes sense.”
Jones expects that ASML will ship another 70 systems in 2019–2020. That’s enough to support production nodes that he detailed in the works at Globalfoundries, Intel, Samsung, and TSMC.
Pellicles, mask testers, and resists are among the top concerns outside the EUV system itself. (Source: ASML)
ASML has plans in place to increase uptime of the systems from about 75% today to 90%, a top concern for lithographers, said Jones. In addition, he expressed confidence that the company will release in time a pellicle needed to protect some EUV wafers from contamination.
To enable resists for 5 nm, “we have 12 to 18 months to make a big improvement. The industry will run lots of wafers next year, and that will help,” said Jones, estimating that fabs will make nearly 1 million EUV wafers in 2019, and 3.4 million by 2021.
ASML aims to boost the 145 wafers/hour throughput that it can get with its 250-W light source to 155 w/h in 2020. It has demonstrated a 375-W light source working in the lab, said Peter Jenkins, ASML’s vice president for corporate strategy and marketing, in a talk here.
The company’s pellicle passes through 83% of light today and has been tested with a 245-W light source for more than 7,000 wafer exposures so far. However, the second-generation 7-nm nodes are expected to need a pellicle with 90% transmission used with a 250-W or greater light source.
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