SAN FRANCISCO — Spin Transfer Technologies (STT), one of a handful of startups developing MRAM technology, has tweaked its strategy under the leadership of former Maxim and Spansion executive Tom Sparkman, who took the helm of the company in July.
STT (Fremont, Calif.) is still developing what it calls orthogonal spin transfer MRAM featuring perpendicular magnetic tunnel junctions (pMTJs) and continues to sample MRAM devices to potential customers in North America and Asia. But in addition to working to offer functional MRAM memories, STT is now planning to productize what it calls an MRAM engine to be embedded in a spin torque transfer MRAM array to correct for inherent flaws in the MTJ technology and boost the performance of MRAM.
In his first interview with EE Times since taking over as CEO of STT, Sparkman did not provide many details on the MRAM engine, saying the company is working to patent the technology before going public with it. But he said he believes the MRAM engine can do for MRAM what SanDisk's invention of All Bit Line (ABL) technology did for NAND flash memory in the early 2000s, providing a mechanism to enhance the performance and reliability of what was an inherently flawed technology.
"NAND was a terrible technology," Sparkman said. "But Eli Harari at SanDisk said, 'I know how to take this technology and put some electronics around it to make it work.' "
The rest, as Sparkman noted, is history. NAND today is considered a key technology in mobile phones and beyond, with a market that is set to be worth more than $50 billion in 2017.
Last year, STT announced it fabricated perpendicular MRAM magnetic tunnel junctions as small as 20nm, among the smallest MTJs ever reported.
Source: STT
The idea for the MRAM engine grew from technology that STT has been playing with for years as a way to correct for the inherent flaws in MRAM technology — the most widely known being that MRAM is a probabilistic technology as opposed to deterministic, meaning that writing to an MRAM cell will work nearly all the time, but occasionally fail. A big part of the challenge of MRAM development has been trying to make the write error rate as low as possible while compensating for the errors that do occur.
STT's engineers "have become experts of correcting for all the flaws in the MTJ," Sparkman said. He added that the engine must be embedded directly into the MRAM array because it's not "a fix after the fact," an approach that STT does not believe will result in MRAM achieving its potential.
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