SAN FRANCISCO—EDA and IP vendor Synopsys Inc. said Tuesday (April 3) that its StarRC parasitic extraction tool has been certified by Taiwanese foundry United Microelectronics Corp. (UMC) for UMC's 28-nanometer (nm) process technologies.
Synopsys (Mountain View, Calif.) said the StarRC solution delivered silicon-validated accuracy on UMC's evaluation designs to meet the qualification criteria for its advanced 28-nm poly SiON and high K/metal gate processes. The StarRC technology files are immediately available to UMC customers working with its 28-nm processes, Synopsys said.
"The qualification of Synopsys' proven StarRC parasitic extraction solution for UMC's 28-nanometer process technology strengthens the portfolio of resources available to our customers for 28-nanometer designs," said S. C. Chien, vice president of the customer engineering and IP development design support divisions at UMC, in a statement. "Mutual customers can now take full advantage of our latest foundry processes and successfully bring their innovations to the marketplace."
StarRC, a parasitic extraction solution for system-on-chip, custom digital, analog/mixed-signal and memory designs, is a component of Synopsys' Galaxy Implementation Platform. StarRC's 28-nm features include modeling for key parasitic effects, including advanced retargeting effects, new via etch and coupling effects, area-dependent via resistance and capacitance, polynomial-based diffusion resistance, and enhanced layout-dependent device parasitic extraction, according to Synopsys.