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The ’LV4040A devices are 12-bit asynchronous binary counters with the outputs of all stages available externally. A high level at the clear (CLR) input asynchronously clears the counter and resets all outputs low. SN74LVC1G14DBVRG4 Texas Instruments(TI) IC SGL SCHMT-TRIG INVERT SOT23-5 The count is advanced on a high-to-low transition at the clock (CLK) input. Applications include time-delay circuits, counter controls, and frequency-dividing circuits. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. SN74LVC1G14DBVRG4 Texas Instruments(TI) IC SGL SCHMT-TRIG INVERT SOT23-5
· Available in Texas Instruments NanoStar™ · ±24-mA Output Drive at 3.3 V and NanoFree™ Packages · Ioff Supports Partial-Power-Down ModeSN74LVC1G14DBVRG4 Texas Instruments(TI) IC SGL SCHMT-TRIG INVERT SOT23-5
· Supports 5-V VCC Operation Operation SN74LVC1G14DBVRG4 Texas Instruments(TI) IC SGL SCHMT-TRIG INVERT SOT23-5
· Inputs Accept Voltages to 5.5 V · Latch-Up Performance Exceeds 100 mA Per
· One Unbuffered Inverter (SN74LVC1GU04) JESD 78, Class II and One Buffered Inverter (SN74LVC1G04) · ESD Protection Exceeds JESD 22 SN74LVC1G14DBVRG4 Texas Instruments(TI) IC SGL SCHMT-TRIG INVERT SOT23-5
· Suitable for Commonly Used Clock – 2000-V Human-Body Model (A114-A) Frequencies: – 200-V Machine Model (A115-A)15 kHz, 3.58 MHz, 4.43 MHz, 13 MHz, – 1000-V Charged-Device Model (C101) 25 MHz, 26 MHz, 27 MHz, 28 MHz
· Max tpd of 2.4 ns at 3.3 V SN74LVC1G14DBVRG4 Texas Instruments(TI) IC SGL SCHMT-TRIG INVERT SOT23-5
· Low Power Consumption, 10-mA Max ICC